{
  "abstract": "The heat pathways in 3D-ICs have long been a labyrinth lacking experimental investigations into spatial distribution of thermal properties, severely limiting study of internal thermal management inside chips. For the first time, we established a methodology for 3D thermal characterizations of advanced 3D-ICs, implemented through a systematic workflow that enables layer-resolved thermal property extraction and the construction of a location-specific thermal database. We demonstrated its application to an advanced sample featuring 2.2-μm-diameter TSVs and ~2-μm-pitch face-to-face hybrid bonding (HB). Time-domain and steady-state thermoreflectance were used to extract the thermal conductivities (TCs) of Al traces, TSV, BEOL interconnects and HB pads, indicating HB structure enables efficient thermal transport with 9 W/m-K TC. Further, we mapped and visualized the TC distribution of TSV structures and RDL Cu wires with small step sizes down to 0.2 μm. Utilizing these results, we proposed an experiment-based thermal model to reveal that co-evolution of interconnect and substrate TCs is essential for thermal design and fabrication towards effective cooling optimization.",
  "abstract_shown": true,
  "affiliations": [],
  "article_type": null,
  "arxiv": "2610.26647",
  "author_total": 6,
  "authors": [
    {
      "name": "Xufei Guo"
    },
    {
      "name": "Yiyun He"
    },
    {
      "name": "Zirou Chen"
    },
    {
      "name": "Zifeng Huang"
    },
    {
      "name": "Runsheng Wang"
    },
    {
      "name": "Zhe Cheng"
    }
  ],
  "bibtex": "https://research.draconitic.com/paper/462gzqh0taw1m.bib",
  "cited_by": 0,
  "doi": "10.48550/arxiv.2610.26647",
  "fulltext_url": null,
  "id": "462gzqh0taw1m",
  "issns": [],
  "landing_url": "https://arxiv.org/abs/2610.26647",
  "language": null,
  "licence": "LicenseRef-arXiv-nonexclusive-1.0",
  "licence_label": "arXiv licence",
  "licence_source": "article",
  "licence_url": "http://arxiv.org/licenses/nonexclusive-distrib/1.0/",
  "metadata_licence": "CC0-1.0",
  "native_subjects": [
    [
      "arxiv",
      "physics.app-ph"
    ],
    [
      "openalex",
      "2208|3D IC and TSV technologies"
    ]
  ],
  "openalex": "W7223021952",
  "pdf_url": "https://arxiv.org/pdf/2610.26647",
  "pmcid": null,
  "pmid": null,
  "published": "2026-10-19",
  "publisher": null,
  "ris": "https://research.draconitic.com/paper/462gzqh0taw1m.ris",
  "sources": [
    {
      "first_seen": "2026-10-30T12:30:52Z",
      "native_id": "2610.26647",
      "source": "arxiv",
      "url": "https://arxiv.org/abs/2610.26647"
    }
  ],
  "subjects": [
    {
      "field": "physics",
      "origin": "arxiv:physics.app-ph",
      "subfield": "applied-instrumentation"
    }
  ],
  "title": "Resolving the Thermal Labyrinth inside 3D-IC Stacks",
  "title_text": "Resolving the Thermal Labyrinth inside 3D-IC Stacks",
  "type": "preprint",
  "updated_at": "2026-10-30T12:33:41Z",
  "url": "https://research.draconitic.com/paper/462gzqh0taw1m",
  "venue": "arXiv",
  "versions": []
}