{
  "abstract": "Achieving timing closure in FPGA designs is crucial, especially for high-performance applications. The Vivado Design Suite offers several strategies for optimization, but finding the best configuration for a given project remains challenging. This paper explores the various Vivado’s timing directives and strategies to improve performance across timing, area, and runtime. Through two test-case designs, an NQR spectrometer SoC-FPGA and a digital readout ASIC prototype for high energy physics particle detector's, different strategies and configurations are compared to identify the most efficient flow.",
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  "article_type": null,
  "arxiv": "2610.38575",
  "author_total": 1,
  "authors": [
    {
      "name": "Kachkachi Nor Eddine"
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  "bibtex": "https://research.draconitic.com/paper/6sa2j9z51b68z.bib",
  "cited_by": 0,
  "doi": "10.48550/arxiv.2610.38575",
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  "id": "6sa2j9z51b68z",
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  "landing_url": "https://hal.science/hal-05841506v1",
  "language": "en",
  "licence": "CC-BY-4.0",
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  "licence_source": "article",
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  "pdf_url": "https://hal.science/hal-05841506/document",
  "pmcid": null,
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  "published": "2026-10-28",
  "publisher": null,
  "ris": "https://research.draconitic.com/paper/6sa2j9z51b68z.ris",
  "sources": [
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      "first_seen": "2026-10-30T12:18:02Z",
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      "native_id": "2610.38575",
      "source": "arxiv",
      "url": "https://arxiv.org/abs/2610.38575"
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  "subjects": [
    {
      "field": "physics",
      "origin": "arxiv:hep-ex",
      "subfield": "high-energy"
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  "title": "Exploring and optimizing the Vivado Flow on large FPGA designs: A Practical Analysis of Strategies and Their Impact on Timing",
  "title_text": "Exploring and optimizing the Vivado Flow on large FPGA designs: A Practical Analysis of Strategies and Their Impact on Timing",
  "type": "preprint",
  "updated_at": "2026-11-01T12:20:45Z",
  "url": "https://research.draconitic.com/paper/6sa2j9z51b68z",
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}