{
  "abstract": "Drain merge (DM), a super via vertically connecting the common S/D terminals of stacked n/pFETs in Complementary FETs (CFETs), blocks further parasitic optimization and cell scaling. For the first time, this work systematically investigates the state-of-the-art Drain Merge through Active (DMtA), a revolutionary technology reported recently with the DM embedded in the active region, through a comprehensive DTCO framework spanning process integration, contact-configuration-dependent (CTCD) compact modeling, standardcell design, RO evaluation and block-level PPA benchmark on a 32-bit RISC-V Ibex core. By reducing DM parasitics and enabling DM-width optimization, DMtA improves RO frequency by 11.7% over its conventional Drain Merge through field (DMtF) counterpart. Active widening and Area Borrowing, the latter first reported in [8] and exploiting spatial slack in adjacent cells to further enlarge the nanosheet width (WNS), increase the maximum Ibex-core frequency by up to 34.8%. More importantly, DMtA also enables the once GAA-exclusive Hyper-cells on CFETs by merging the active regions across adjacent cell rows, providing a further 8.7% frequency gain. A post-routing floating-output-pin-aware optimization further removes redundant S/D contacts (CTs) and reduces power by 5.3%. Finally, DMtA facilitates more area-efficient 2.5T cell scaling by preserving single-row cell compatibility, reducing post-PR core area by 25.7%.",
  "abstract_shown": true,
  "affiliations": [],
  "article_type": null,
  "arxiv": "2609.07329",
  "author_total": 14,
  "authors": [
    {
      "name": "Jingru Jiang"
    },
    {
      "name": "Haoran Lu"
    },
    {
      "name": "Kairong Guo"
    },
    {
      "name": "Yibo Zhang"
    },
    {
      "name": "Yifei Chen"
    },
    {
      "name": "Wanyue Peng"
    },
    {
      "name": "Yu Liu"
    },
    {
      "name": "Jiacheng Sun"
    },
    {
      "name": "Xiaoyan Xu"
    },
    {
      "name": "Ming Li"
    },
    {
      "name": "Yibo Lin"
    },
    {
      "name": "Runsheng Wang"
    },
    {
      "name": "Ru Huang"
    },
    {
      "name": "Heng Wu"
    }
  ],
  "bibtex": "https://research.draconitic.com/paper/8xxzyy24772br.bib",
  "cited_by": 0,
  "doi": "10.48550/arxiv.2609.07329",
  "fulltext_url": null,
  "id": "8xxzyy24772br",
  "issns": [],
  "landing_url": "https://arxiv.org/abs/2609.07329",
  "language": null,
  "licence": "LicenseRef-arXiv-nonexclusive-1.0",
  "licence_label": "arXiv licence",
  "licence_source": "article",
  "licence_url": "http://arxiv.org/licenses/nonexclusive-distrib/1.0/",
  "metadata_licence": "CC0-1.0",
  "native_subjects": [
    [
      "arxiv",
      "cond-mat.mes-hall"
    ],
    [
      "openalex",
      "2208|Advancements in Semiconductor Devices and Circuit Design"
    ]
  ],
  "openalex": "W7212023249",
  "pdf_url": "https://arxiv.org/pdf/2609.07329",
  "pmcid": null,
  "pmid": null,
  "published": "2026-09-07",
  "publisher": null,
  "ris": "https://research.draconitic.com/paper/8xxzyy24772br.ris",
  "sources": [
    {
      "first_seen": "2026-10-30T12:19:48Z",
      "native_id": "2609.07329",
      "source": "arxiv",
      "url": "https://arxiv.org/abs/2609.07329"
    }
  ],
  "subjects": [
    {
      "field": "physics",
      "origin": "arxiv:cond-mat.mes-hall",
      "subfield": "condensed-matter"
    }
  ],
  "title": "Unveiling the Scaling Potential of Drain Merge through Active (DMtA) in CFETs: Breaking the Super-Via Bottlenecks and Unlocking New PPA Boosters",
  "title_text": "Unveiling the Scaling Potential of Drain Merge through Active (DMtA) in CFETs: Breaking the Super-Via Bottlenecks and Unlocking New PPA Boosters",
  "type": "preprint",
  "updated_at": "2026-10-30T12:19:48Z",
  "url": "https://research.draconitic.com/paper/8xxzyy24772br",
  "venue": "arXiv",
  "versions": []
}