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PreprintarXiv licencearXiv

Control-Noise Trade-offs in Industrially Integrated 28Si/SiGe Spin-1/2 Qubits

Abstract

Scaling silicon spin qubits to fault-tolerant processors requires semiconductor foundry integration, yet it remains unclear how industrial fabrication and dense device integration affect qubit control and noise. Here we study 28Si/SiGe electron spin-1/2 qubits fabricated using Intel's industry-compatible 300 mm process and incorporating micromagnets for electrically driven spin resonance, using a high-performance device fabricated in the RIKEN research cleanroom as a reference. Primitive π/2-gate fidelities reach the 99.99% level in the Intel devices, which also exhibit longer idle coherence, weaker low-frequency correlations and reduced qubit-to-qubit variability across several measured characteristics. In the present Intel devices, the micromagnets are integrated inline with the back-end-of-line (BEOL) contact routing, with their separation from the quantum well set through the vertical stack design. Relative to the reference, their larger separation contributes to weaker longitudinal and transverse magnetic-field gradients. The weaker longitudinal gradient suppresses the conversion of charge noise into qubit-frequency fluctuations, whereas the weaker transverse gradient reduces electrically driven spin-resonance efficiency and makes drive-dependent errors relevant at lower Rabi frequencies. Additional BEOL routing and metal levels required for two-dimensional arrays make such placement decisions increasingly consequential when scaling. These results establish an integration-level control-noise trade-off linking micromagnet placement within densely routed layouts to achievable gate performance, while very high-fidelity operation remains possible in industrially fabricated devices.

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BibTeX
@misc{camenzind2026controlnoise,
  title = {{Control-Noise Trade-offs in Industrially Integrated $^28\mathrmSi/\mathrmSiGe$ Spin-1/2 Qubits}},
  author = {Leon C. Camenzind and Ik Kyeong Jin and Yi-Hsien Wu and Akito Noiri and Kenta Takeda and Takashi Nakajima and Takashi Kobayashi and Giordano Scappucci and Seigo Tarucha},
  howpublished = {arXiv},
  year = {2026},
  month = oct,
  doi = {10.48550/arxiv.2610.41890},
  eprint = {2610.41890},
  archivePrefix = {arXiv},
  url = {https://arxiv.org/abs/2610.41890},
}
RIS
TY  - UNPB
TI  - Control-Noise Trade-offs in Industrially Integrated ^28Si/SiGe Spin-1/2 Qubits
AU  - Leon C. Camenzind
AU  - Ik Kyeong Jin
AU  - Yi-Hsien Wu
AU  - Akito Noiri
AU  - Kenta Takeda
AU  - Takashi Nakajima
AU  - Takashi Kobayashi
AU  - Giordano Scappucci
AU  - Seigo Tarucha
PY  - 2026
DA  - 2026/10/30
PB  - arXiv
DO  - 10.48550/arxiv.2610.41890
UR  - https://arxiv.org/abs/2610.41890
AB  - Scaling silicon spin qubits to fault-tolerant processors requires semiconductor foundry integration, yet it remains unclear how industrial fabrication and dense device integration affect qubit control and noise. Here we study ^28Si/SiGe electron spin-1/2 qubits fabricated using Intel's industry-compatible 300 mm process and incorporating micromagnets for electrically driven spin resonance, using a high-performance device fabricated in the RIKEN research cleanroom as a reference. Primitive π/2-gate fidelities reach the 99.99% level in the Intel devices, which also exhibit longer idle coherence, weaker low-frequency correlations and reduced qubit-to-qubit variability across several measured characteristics. In the present Intel devices, the micromagnets are integrated inline with the back-end-of-line (BEOL) contact routing, with their separation from the quantum well set through the vertical stack design. Relative to the reference, their larger separation contributes to weaker longitudinal and transverse magnetic-field gradients. The weaker longitudinal gradient suppresses the conversion of charge noise into qubit-frequency fluctuations, whereas the weaker transverse gradient reduces electrically driven spin-resonance efficiency and makes drive-dependent errors relevant at lower Rabi frequencies. Additional BEOL routing and metal levels required for two-dimensional arrays make such placement decisions increasingly consequential when scaling. These results establish an integration-level control-noise trade-off linking micromagnet placement within densely routed layouts to achievable gate performance, while very high-fidelity operation remains possible in industrially fabricated devices.
ER  -