Nearest-neighbour gates are all you need: High-rate quantum low-density parity-check codes on a planar grid

@misc{gu2026nearestneighbour,
  title = {{Nearest-neighbour gates are all you need: High-rate quantum low-density parity-check codes on a planar grid}},
  author = {Boren Gu and Tamas Noszko and Vincent Steffan and Jens Niklas Eberhardt and Joschka Roffe and Jens Eisert and Stergios Koutsioumpas},
  howpublished = {arXiv},
  year = {2026},
  month = oct,
  doi = {10.48550/arxiv.2606.19482},
  eprint = {2606.19482},
  archivePrefix = {arXiv},
  url = {https://arxiv.org/abs/2606.19482},
  note = {CC BY 4.0},
}

TY  - UNPB
TI  - Nearest-neighbour gates are all you need: High-rate quantum low-density parity-check codes on a planar grid
AU  - Boren Gu
AU  - Tamas Noszko
AU  - Vincent Steffan
AU  - Jens Niklas Eberhardt
AU  - Joschka Roffe
AU  - Jens Eisert
AU  - Stergios Koutsioumpas
PY  - 2026
DA  - 2026/10/02
PB  - arXiv
DO  - 10.48550/arxiv.2606.19482
UR  - https://arxiv.org/abs/2606.19482
AB  - High-performance quantum low-density parity-check codes promise substantial reductions in the overhead of fault-tolerant quantum computation, but most constructions require long-range connectivity or qubit shuttling, both of which are difficult to realise in superconducting architectures. Here we introduce a family of quantum low-density parity-check codes that, for the first time, combines planar open-boundary layouts, finite-size advantages over surface codes, and syndrome extraction using only nearest-neighbour gates on a planar grid of qubits with either square or hexagonal connectivity. The resulting circuits achieve optimal constant-depth stabiliser measurement, independent of code size, and naturally remove leakage from the system by exchanging the roles of check and data qubits at each syndrome extraction round. We find finite-size instances such as a [[323,14,15]] code, whose code-efficiency ratio is nearly an order of magnitude larger than that of rotated surface-code patches. At around 40 circuit qubits per logical qubit, the best directional tile-code layouts reduce the per-logical per-round logical error rate by a factor of 100 relative to rotated surface-code memories. These results show that the advantages of quantum low-density parity-check codes can survive compilation into strictly planar nearest-neighbour circuits, bringing low-overhead fault-tolerant memories closer to near-term hardware.
ER  -