Engineering logical gates with irrep surface codes
Abstract
Fault-tolerant quantum computation can incur a substantial resource cost when a desired logical operation must be constructed from a restricted set of logical primitives. To make such operations directly available, we introduce irrep surface codes (ISCs), two-dimensional topological quantum error-correcting codes engineered to transversally implement a prescribed set of logical gates. The target logical gates only need to satisfy two conditions: (i) they generate a finite group, which, up to global phases, is forced by the Eastin-Knill theorem, and (ii) they are irreducible, meaning that any operator commuting with the set of gates must be proportional to the identity. This accommodates arbitrary finite groups of diagonal gates and arbitrary reversible classical gates, since each can be embedded into a larger irreducible finite group of gates. It also enables logical gates outside every finite level of the Clifford hierarchy. To incorporate these operations into surface-code computations, we further develop lattice-surgery protocols to transfer the encoded information between surface codes and ISCs obeying one of two sufficient conditions. Together, these results establish a systematic method for tailoring topological codes to desired logical operations and integrating them into conventional computations.
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BibTeX
@misc{li2026engineering,
title = {{Engineering logical gates with irrep surface codes}},
author = {Yabo Li and Zijian Song and Vieri Mattei and Naren Manjunath and Apoorv Tiwari and Tyler D. Ellison},
howpublished = {arXiv},
year = {2026},
month = oct,
doi = {10.48550/arxiv.2610.06775},
eprint = {2610.06775},
archivePrefix = {arXiv},
url = {https://arxiv.org/abs/2610.06775},
}
RIS
TY - UNPB
TI - Engineering logical gates with irrep surface codes
AU - Yabo Li
AU - Zijian Song
AU - Vieri Mattei
AU - Naren Manjunath
AU - Apoorv Tiwari
AU - Tyler D. Ellison
PY - 2026
DA - 2026/10/22
PB - arXiv
DO - 10.48550/arxiv.2610.06775
UR - https://arxiv.org/abs/2610.06775
AB - Fault-tolerant quantum computation can incur a substantial resource cost when a desired logical operation must be constructed from a restricted set of logical primitives. To make such operations directly available, we introduce irrep surface codes (ISCs), two-dimensional topological quantum error-correcting codes engineered to transversally implement a prescribed set of logical gates. The target logical gates only need to satisfy two conditions: (i) they generate a finite group, which, up to global phases, is forced by the Eastin-Knill theorem, and (ii) they are irreducible, meaning that any operator commuting with the set of gates must be proportional to the identity. This accommodates arbitrary finite groups of diagonal gates and arbitrary reversible classical gates, since each can be embedded into a larger irreducible finite group of gates. It also enables logical gates outside every finite level of the Clifford hierarchy. To incorporate these operations into surface-code computations, we further develop lattice-surgery protocols to transfer the encoded information between surface codes and ISCs obeying one of two sufficient conditions. Together, these results establish a systematic method for tailoring topological codes to desired logical operations and integrating them into conventional computations.
ER -