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High-Accuracy Propagation-Assisted Local Decoding for Fast Transversal Clifford Circuits

Abstract

We benchmark the Iterative Redecode Scheme (IRS) on fast transversal Clifford circuits, achieving high-accuracy correlated decoding using local memory-style detectors and decoders. On a deep random Clifford benchmark, IRS yields approximately 4× lower logical failure rates than the ghost protocol at d=11 with matched buffers, and 15× lower rates than logical observable matching (LOM). In three-block GHZ preparation, IRS achieves 2× lower logical error rates than reliable logical Pauli-product decoding with matched initialisation, improving to 25× at d=19 with ⌈ d/2⌉ full initialisation rounds. We place IRS, which builds on Wan et al.'s scheme, within a broader propagation-assisted local (PAL) framework, where local decoders exchange messages rather than decoding a global hypergraph. IRS alternates local minimum-weight perfect matching (MWPM) on memory-equivalent detector error models (DEMs) with Pauli-frame propagation and detector updates across transversal CNOT layers, seeking local error estimates consistent with the global detector record. Prior-informed DEMs account for probabilities of propagated errors missing from the memory-equivalent model, improving initial decoding and reducing logical error rates. Zero-weight physical Pauli mechanisms enable inference and propagation of initially indeterminate stabilizer outcomes. Error rates saturate after a few iterations even for deep, adversarial alternating-tCNOT circuits, allowing iteration caps with negligible loss of accuracy. We find syndrome-extraction buffers of order ⌊ d/4⌋ sufficient for distance-dependent error suppression in the demanding regimes studied. The approach extends to other local decoders and CSS codes; for repeated logical S gates, IRS achieves approximately $4$ to 10× lower logical error rates than LOM, depending on initialisation.

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BibTeX
@misc{webber2026highaccuracy,
  title = {{High-Accuracy Propagation-Assisted Local Decoding for Fast Transversal Clifford Circuits}},
  author = {Mark Webber and Simanraj Sadana and Matthew A. Lane and Lucy Jade Robson and Anthony O'Rourke},
  howpublished = {arXiv},
  year = {2026},
  month = oct,
  doi = {10.48550/arxiv.2610.26784},
  eprint = {2610.26784},
  archivePrefix = {arXiv},
  url = {https://arxiv.org/abs/2610.26784},
}
RIS
TY  - UNPB
TI  - High-Accuracy Propagation-Assisted Local Decoding for Fast Transversal Clifford Circuits
AU  - Mark Webber
AU  - Simanraj Sadana
AU  - Matthew A. Lane
AU  - Lucy Jade Robson
AU  - Anthony O'Rourke
PY  - 2026
DA  - 2026/10/19
PB  - arXiv
DO  - 10.48550/arxiv.2610.26784
UR  - https://arxiv.org/abs/2610.26784
AB  - We benchmark the Iterative Redecode Scheme (IRS) on fast transversal Clifford circuits, achieving high-accuracy correlated decoding using local memory-style detectors and decoders. On a deep random Clifford benchmark, IRS yields approximately 4× lower logical failure rates than the ghost protocol at d=11 with matched buffers, and 15× lower rates than logical observable matching (LOM). In three-block GHZ preparation, IRS achieves 2× lower logical error rates than reliable logical Pauli-product decoding with matched initialisation, improving to 25× at d=19 with ⌈ d/2⌉ full initialisation rounds. We place IRS, which builds on Wan et al.'s scheme, within a broader propagation-assisted local (PAL) framework, where local decoders exchange messages rather than decoding a global hypergraph. IRS alternates local minimum-weight perfect matching (MWPM) on memory-equivalent detector error models (DEMs) with Pauli-frame propagation and detector updates across transversal CNOT layers, seeking local error estimates consistent with the global detector record. Prior-informed DEMs account for probabilities of propagated errors missing from the memory-equivalent model, improving initial decoding and reducing logical error rates. Zero-weight physical Pauli mechanisms enable inference and propagation of initially indeterminate stabilizer outcomes. Error rates saturate after a few iterations even for deep, adversarial alternating-tCNOT circuits, allowing iteration caps with negligible loss of accuracy. We find syndrome-extraction buffers of order ⌊ d/4⌋ sufficient for distance-dependent error suppression in the demanding regimes studied. The approach extends to other local decoders and CSS codes; for repeated logical S gates, IRS achieves approximately $4$ to 10× lower logical error rates than LOM, depending on initialisation.
ER  -