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Efficient LLM-Generated Shuttling Compilers for Complex Trapped-Ion Architectures

Abstract

Trapped-ion quantum computers rely on shuttling compilers, which cast an input algorithm into a sequence of ion-qubit movements within a given architecture. We present the first study in which a single frontier large language model (LLM), Claude Opus 4.7, generates and iteratively refines the Python code of shuttling compilers from written specifications. Starting with a compiler for (i) a linear segmented trap, we extend it to (ii) a trap with junctions, and finally achieve efficient compilation for (iii) a broad class of connected trap graphs. The compilers for the more general cases are seeded with code from the previous ones. We benchmark the LLM-generated compilers against state-of-the-art hand-crafted ones using a common suite of quantum circuits. The number of shuttling timesteps is reduced by up to 72% for (i) and up to 43% for (ii). For the broad case (iii) of freely connected architectures, we find large variations in the required number of shuttling timesteps, depending on the connectivity. A densely connected, junction-rich architecture yields up to an order-of-magnitude reduction in shuttling timesteps compared to a corridor-like one. Repeating the complete generation and evaluation with a second frontier LLM, Claude Fable 5, reproduces these findings, with the Fable 5 compilers surpassing the hand-crafted ones more often on the largest circuits. Our results show that an unmodified frontier LLM can produce working, correct, and competitive shuttling compilers without additional manual algorithmic engineering. Generating compilers this way reduces the development time for new architectures from several months to a few days.

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BibTeX
@misc{kreppel2026efficient,
  title = {{Efficient LLM-Generated Shuttling Compilers for Complex Trapped-Ion Architectures}},
  author = {Fabian Kreppel and Reza Salkhordeh and Ferdinand Schmidt-Kaler and André Brinkmann},
  howpublished = {arXiv},
  year = {2026},
  month = oct,
  doi = {10.48550/arxiv.2607.24714},
  eprint = {2607.24714},
  archivePrefix = {arXiv},
  url = {https://arxiv.org/abs/2607.24714},
}
RIS
TY  - UNPB
TI  - Efficient LLM-Generated Shuttling Compilers for Complex Trapped-Ion Architectures
AU  - Fabian Kreppel
AU  - Reza Salkhordeh
AU  - Ferdinand Schmidt-Kaler
AU  - André Brinkmann
PY  - 2026
DA  - 2026/10/16
PB  - arXiv
DO  - 10.48550/arxiv.2607.24714
UR  - https://arxiv.org/abs/2607.24714
AB  - Trapped-ion quantum computers rely on shuttling compilers, which cast an input algorithm into a sequence of ion-qubit movements within a given architecture. We present the first study in which a single frontier large language model (LLM), Claude Opus 4.7, generates and iteratively refines the Python code of shuttling compilers from written specifications. Starting with a compiler for (i) a linear segmented trap, we extend it to (ii) a trap with junctions, and finally achieve efficient compilation for (iii) a broad class of connected trap graphs. The compilers for the more general cases are seeded with code from the previous ones. We benchmark the LLM-generated compilers against state-of-the-art hand-crafted ones using a common suite of quantum circuits. The number of shuttling timesteps is reduced by up to 72% for (i) and up to 43% for (ii). For the broad case (iii) of freely connected architectures, we find large variations in the required number of shuttling timesteps, depending on the connectivity. A densely connected, junction-rich architecture yields up to an order-of-magnitude reduction in shuttling timesteps compared to a corridor-like one. Repeating the complete generation and evaluation with a second frontier LLM, Claude Fable 5, reproduces these findings, with the Fable 5 compilers surpassing the hand-crafted ones more often on the largest circuits. Our results show that an unmodified frontier LLM can produce working, correct, and competitive shuttling compilers without additional manual algorithmic engineering. Generating compilers this way reduces the development time for new architectures from several months to a few days.
ER  -