Single-event upset response of the ITkPixV1.1 pixel readout chip with 24 GeV proton irradiation
Abstract
Single-event upsets (SEUs) in pixel frontend configuration registers can degrade data acquisition stability in the harsh hadron environment expected during high luminosity large hadron collider (HL-LHC) operation. We present a SEU irradiation campaign performed on an ITkPixV1.1 single chip card (SCC) exposed to a 24 GeV proton beam at the CERN IRRAD facility. The study targets the chip configuration registers, and SEU cross sections ( σ SEU ) are extracted as a function of the register protection scheme by comparing standard unprotected storage elements with triple modular redundancy (TMR) protected bits. SEUs are identified by repeated configuration programming and readback comparisons during irradiation, with no periodic reconfiguration was applied. Finally, we discuss operational mitigation techniques such as TMR and periodic reconfiguration in the context of expected HL-LHC upset rates. These results provide input for reliability projections and operational guidelines for the inner tracker (ITk) pixel readout during HL-LHC running.
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BibTeX
@article{khwaira2026singleevent,
title = {{Single-event upset response of the ITkPixV1.1 pixel readout chip with 24 GeV proton irradiation}},
author = {Yahya Khwaira and Abdenour Lounis and Maurice Cohen-Solal and Mohsine Menouni and Pierre Barrillon and Denis Fougeron},
journal = {JINST},
year = {2026},
month = nov,
doi = {10.1088/1748-0221/21/10/p10032},
url = {https://hal.science/hal-05849621v1},
note = {CC BY},
}
RIS
TY - JOUR
TI - Single-event upset response of the ITkPixV1.1 pixel readout chip with 24 GeV proton irradiation
AU - Yahya Khwaira
AU - Abdenour Lounis
AU - Maurice Cohen-Solal
AU - Mohsine Menouni
AU - Pierre Barrillon
AU - Denis Fougeron
PY - 2026
DA - 2026/11/03
JO - JINST
DO - 10.1088/1748-0221/21/10/p10032
UR - https://hal.science/hal-05849621v1
AB - Single-event upsets (SEUs) in pixel frontend configuration registers can degrade data acquisition stability in the harsh hadron environment expected during high luminosity large hadron collider (HL-LHC) operation. We present a SEU irradiation campaign performed on an ITkPixV1.1 single chip card (SCC) exposed to a 24 GeV proton beam at the CERN IRRAD facility. The study targets the chip configuration registers, and SEU cross sections ( σ SEU ) are extracted as a function of the register protection scheme by comparing standard unprotected storage elements with triple modular redundancy (TMR) protected bits. SEUs are identified by repeated configuration programming and readback comparisons during irradiation, with no periodic reconfiguration was applied. Finally, we discuss operational mitigation techniques such as TMR and periodic reconfiguration in the context of expected HL-LHC upset rates. These results provide input for reliability projections and operational guidelines for the inner tracker (ITk) pixel readout during HL-LHC running.
ER -