On Performance and Limitations of Quantum Wave Packet Dynamics Simulated using NISQ Hardware
Abstract
We investigate one-dimensional quantum wave-packet dynamics using a grid-based encoding of the wave function onto qubit registers. Time evolution is implemented using a split operator approach, with the kinetic energy operator realized via the Quantum Fourier Transform (QFT) and arbitrary discretized potentials represented by commuting Pauli-Z gates. The algorithm is benchmarked against classical grid-based simulations and validated using a noiseless Qiskit Statevector simulator before being implemented on current quantum hardware (IBM Quantum and IonQ) for qubit counts ranging from two to five. Good agreement with benchmark calculations is obtained for two- and three-qubit implementations, while deviations increase at larger qubit counts due to hardware noise and increased circuit depth. Among the devices examined, the algorithm maintains closer agreement with the benchmark on the trapped-ion IonQ Forte processor as the number of qubits increases.
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BibTeX
@misc{kuanysheva2026performance,
title = {{On Performance and Limitations of Quantum Wave Packet Dynamics Simulated using NISQ Hardware}},
author = {Tamila Kuanysheva and Jonathan Andrade-Plascencia and Jayakrushna Sahoo and Brian Kendrick and Dmitri Babikov},
howpublished = {arXiv},
year = {2026},
month = oct,
doi = {10.48550/arxiv.2605.20078},
eprint = {2605.20078},
archivePrefix = {arXiv},
url = {https://arxiv.org/abs/2605.20078},
note = {CC BY 4.0},
}
RIS
TY - UNPB
TI - On Performance and Limitations of Quantum Wave Packet Dynamics Simulated using NISQ Hardware
AU - Tamila Kuanysheva
AU - Jonathan Andrade-Plascencia
AU - Jayakrushna Sahoo
AU - Brian Kendrick
AU - Dmitri Babikov
PY - 2026
DA - 2026/10/20
PB - arXiv
DO - 10.48550/arxiv.2605.20078
UR - https://arxiv.org/abs/2605.20078
AB - We investigate one-dimensional quantum wave-packet dynamics using a grid-based encoding of the wave function onto qubit registers. Time evolution is implemented using a split operator approach, with the kinetic energy operator realized via the Quantum Fourier Transform (QFT) and arbitrary discretized potentials represented by commuting Pauli-Z gates. The algorithm is benchmarked against classical grid-based simulations and validated using a noiseless Qiskit Statevector simulator before being implemented on current quantum hardware (IBM Quantum and IonQ) for qubit counts ranging from two to five. Good agreement with benchmark calculations is obtained for two- and three-qubit implementations, while deviations increase at larger qubit counts due to hardware noise and increased circuit depth. Among the devices examined, the algorithm maintains closer agreement with the benchmark on the trapped-ion IonQ Forte processor as the number of qubits increases.
ER -