Low-Overhead Quantum Error Correction with Boundary-Connected Planar Modules
Abstract
Realizing practical quantum computers requires quantum error correction, but the most widely implemented approach, the planar surface code, demands a substantial physical qubit overhead. Here, we demonstrate that partitioning quantum processors into manageable, flat modules with non-local inter-module connections provides a natural solution. By wiring sparse, static boundary connections between Euclidean planar modules, we construct modular hyperbolic surface and color codes, based on new families of semi-hyperbolic codes. Using modular syndrome extraction circuits and efficient neural network and matching decoders, our circuit-level simulations show that this modular memory design can reduce the physical qubit overhead by tenfold or more compared to the surface code, even under elevated inter-module seam error rates. Projecting to larger system sizes, we find modular codes with encoding rate k/n=1/16 and distance d≥ 22, exceeding both the rate and distance of the $[[288,12,18]]$ two-gross bivariate bicycle code while using mostly nearest-neighbor gates within planar modules, and implying an over 30× overhead reduction relative to surface codes. We develop fault-tolerant walking circuits for implementing logic via code automorphisms, which we co-design with low-weight, highly symmetrical logical bases and a modular extractor system that is ≈ 4.5× smaller than the code itself. Combining these methods, our modular memory can be used as dense storage in a universal fault-tolerant architecture, unlocking the efficiency of high-rate codes without sacrificing the fabrication advantages of planar modules.
Related
- Connected Geometries in Gravitational Path Integrals, and Normalized No-Boundary Probabilities
- Quantum circuit compilation with constant overhead
- Purely-logarithmic-time- and constant-space-overhead fault-tolerant quantum computation
- Scalable long-distance quantum fan-out gates with reduced resource overhead
- Scalable long-distance quantum fan-out gates with reduced resource overhead
BibTeX
@misc{higgott2026lowoverhead,
title = {{Low-Overhead Quantum Error Correction with Boundary-Connected Planar Modules}},
author = {Oscar Higgott and Hasan Sayginel and Francisco J. H. Heras and Zhiyang He and Tomas Jochym-O'Connor and Andrew W. Senior and Lei M. Zhang and Thomas Edlich and James S. Spencer and Matt McEwen and Craig Gidney and Johannes Bausch and Pushmeet Kohli and Hartmut Neven},
howpublished = {arXiv},
year = {2026},
month = oct,
doi = {10.48550/arxiv.2610.03682},
eprint = {2610.03682},
archivePrefix = {arXiv},
url = {https://arxiv.org/abs/2610.03682},
note = {CC BY 4.0},
}
RIS
TY - UNPB
TI - Low-Overhead Quantum Error Correction with Boundary-Connected Planar Modules
AU - Oscar Higgott
AU - Hasan Sayginel
AU - Francisco J. H. Heras
AU - Zhiyang He
AU - Tomas Jochym-O'Connor
AU - Andrew W. Senior
AU - Lei M. Zhang
AU - Thomas Edlich
AU - James S. Spencer
AU - Matt McEwen
AU - Craig Gidney
AU - Johannes Bausch
AU - Pushmeet Kohli
AU - Hartmut Neven
PY - 2026
DA - 2026/10/02
PB - arXiv
DO - 10.48550/arxiv.2610.03682
UR - https://arxiv.org/abs/2610.03682
AB - Realizing practical quantum computers requires quantum error correction, but the most widely implemented approach, the planar surface code, demands a substantial physical qubit overhead. Here, we demonstrate that partitioning quantum processors into manageable, flat modules with non-local inter-module connections provides a natural solution. By wiring sparse, static boundary connections between Euclidean planar modules, we construct modular hyperbolic surface and color codes, based on new families of semi-hyperbolic codes. Using modular syndrome extraction circuits and efficient neural network and matching decoders, our circuit-level simulations show that this modular memory design can reduce the physical qubit overhead by tenfold or more compared to the surface code, even under elevated inter-module seam error rates. Projecting to larger system sizes, we find modular codes with encoding rate k/n=1/16 and distance d≥ 22, exceeding both the rate and distance of the $[[288,12,18]]$ two-gross bivariate bicycle code while using mostly nearest-neighbor gates within planar modules, and implying an over 30× overhead reduction relative to surface codes. We develop fault-tolerant walking circuits for implementing logic via code automorphisms, which we co-design with low-weight, highly symmetrical logical bases and a modular extractor system that is ≈ 4.5× smaller than the code itself. Combining these methods, our modular memory can be used as dense storage in a universal fault-tolerant architecture, unlocking the efficiency of high-rate codes without sacrificing the fabrication advantages of planar modules.
ER -