A fabrication-aware vectorized generative representation for topology optimization of path-defined MEMS microstructures.
4 affiliations
- 1Key Laboratory of MEMS of the Ministry of Education, Southeast University, Nanjing, China.
- 2School of Integrated Circuits, Jiangnan University, Wuxi, China.
- 3Jiangsu Provincial Key Laboratory of MEMS Sensors and ASIC Manufacturing Technology, Jiangnan University, Wuxi, China.
- 4Key Laboratory of MEMS of the Ministry of Education, Southeast University, Nanjing, China. [email protected].
Abstract
This work proposes a vectorized generative representation for fabrication-aware heuristic topology optimization of path-defined MEMS microstructures, addressing the trade-off between topological freedom and fabrication feasibility in MEMS inverse design. Pixel-level topology descriptions provide high design freedom and often require additional constraints to suppress disconnected or fabrication-incompatible layouts. Meanwhile, heuristic algorithms are attractive for non-gradient MEMS optimization, yet their efficiency depends critically on the compactness and validity of the design representation. The proposed representation addresses this limitation by mapping low-dimensional continuous design variables into connected, fabrication-compatible physical layouts, with topology evolution, boundary compatibility, linewidth modulation, spacing constraints, and geometric smoothing embedded directly into the generation process. This formulation provides a compact continuous search space in which path topology, spatial deployment, and local linewidth can be jointly explored while the prescribed fabrication constraints are maintained during decoding. Each generated layout is exported as a vector geometry for finite-element electrothermal labeling and rasterized as a morphology image for surrogate-model training, enabling rapid performance prediction during optimization. In a resistive thermal MEMS microheater used as the primary experimental validation case, infrared thermography showed that the measured temperature coefficient of variation decreased from 4.04% to 1.22%, while the ±2 °C effective isothermal area ratio increased from 34.7% to 95.6%. Finite-element results from a compliant micro-spring case demonstrated transferability: in-plane displacement increased by 30.6%, while peak von Mises stress decreased by 16.3% under matched footprint and loading. These results demonstrate the applicability of the proposed representation as a fabrication-compatible optimization interface for path-defined MEMS microstructures under distinct physical objectives.
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BibTeX
@article{liu2026fabricationaware,
title = {{A fabrication-aware vectorized generative representation for topology optimization of path-defined MEMS microstructures.}},
author = {Gong-Zeng Liu and Lin-Feng Zhao and Jie Zhang and Xiang Liu and Yi-Meng Lv and Tian-Yu Geng and Zai-Fa Zhou},
journal = {Microsystems \& nanoengineering},
year = {2026},
month = oct,
doi = {10.1038/s41378-026-01470-3},
url = {https://europepmc.org/article/MED/42897129},
note = {CC BY-NC-ND},
}
RIS
TY - JOUR
TI - A fabrication-aware vectorized generative representation for topology optimization of path-defined MEMS microstructures.
AU - Gong-Zeng Liu
AU - Lin-Feng Zhao
AU - Jie Zhang
AU - Xiang Liu
AU - Yi-Meng Lv
AU - Tian-Yu Geng
AU - Zai-Fa Zhou
PY - 2026
DA - 2026/10/19
JO - Microsystems & nanoengineering
DO - 10.1038/s41378-026-01470-3
UR - https://europepmc.org/article/MED/42897129
AB - This work proposes a vectorized generative representation for fabrication-aware heuristic topology optimization of path-defined MEMS microstructures, addressing the trade-off between topological freedom and fabrication feasibility in MEMS inverse design. Pixel-level topology descriptions provide high design freedom and often require additional constraints to suppress disconnected or fabrication-incompatible layouts. Meanwhile, heuristic algorithms are attractive for non-gradient MEMS optimization, yet their efficiency depends critically on the compactness and validity of the design representation. The proposed representation addresses this limitation by mapping low-dimensional continuous design variables into connected, fabrication-compatible physical layouts, with topology evolution, boundary compatibility, linewidth modulation, spacing constraints, and geometric smoothing embedded directly into the generation process. This formulation provides a compact continuous search space in which path topology, spatial deployment, and local linewidth can be jointly explored while the prescribed fabrication constraints are maintained during decoding. Each generated layout is exported as a vector geometry for finite-element electrothermal labeling and rasterized as a morphology image for surrogate-model training, enabling rapid performance prediction during optimization. In a resistive thermal MEMS microheater used as the primary experimental validation case, infrared thermography showed that the measured temperature coefficient of variation decreased from 4.04% to 1.22%, while the ±2 °C effective isothermal area ratio increased from 34.7% to 95.6%. Finite-element results from a compliant micro-spring case demonstrated transferability: in-plane displacement increased by 30.6%, while peak von Mises stress decreased by 16.3% under matched footprint and loading. These results demonstrate the applicability of the proposed representation as a fabrication-compatible optimization interface for path-defined MEMS microstructures under distinct physical objectives.
SN - 2096-1030
SN - 2055-7434
ER -