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PreprintCC BY 4.0arXiv

JFS-CryoMem: A Cryogenic Memory with Voltage-Controlled Superconducting Devices and Femtojoule-Scale Write/Read Energies

Abstract

Scalable cryogenic systems require memory that combines nonvolatile storage, selective access, low thermal disturbance, and compatibility with superconducting electronics. We present a cryogenic memory architecture that integrates a voltage-controlled Josephson junction field-effect transistor (JJFET) selector with a ferroelectric superconducting quantum interference device (FeSQUID) storage element, hereafter termed JFS-CryoMem. The JJFET provides gate-controlled cell selection, whereas the FeSQUID stores information in stable remanent-polarization states. JFS-CryoMem features separate read and write path mechanisms that support nondestructive readout and independent optimization of programming and sensing conditions. The architecture is evaluated using experimentally calibrated compact models that reproduce the measured electrical characteristics of both constituent devices. We demonstrate selective programming using a half-bias scheme, nonvolatile state retention, and distinguishable readout in a 4 × 4 array while accounting for the selected cell and all unselected parallel branches. We then extend the analysis to arrays up to 16 × 16 and examine how array scaling alters current distribution, column-equivalent resistance, readout separation, required bitline current, and read energy. The results reveal the principal sensing and energy tradeoffs associated with larger arrays and identify the operating conditions required to preserve read distinguishability as the array grows. JFS-CryoMem provides a device-to-array framework for cryogenic memory in quantum, high-performance, and space-oriented computing systems.

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BibTeX
@misc{udoy2026jfscryomem,
  title = {{JFS-CryoMem: A Cryogenic Memory with Voltage-Controlled Superconducting Devices and Femtojoule-Scale Write/Read Energies}},
  author = {Md Rahatul Islam Udoy and Md Mazharul Islam and Juan P. Mendez and Denis Mamaluy and Aaron J. Muhowski and Samuel Hawkins and William M. Martinez and Courtney Sovinec and Wei Pan and Ahmedullah Aziz},
  howpublished = {arXiv},
  year = {2026},
  month = sep,
  doi = {10.48550/arxiv.2609.33163},
  eprint = {2609.33163},
  archivePrefix = {arXiv},
  url = {https://arxiv.org/abs/2609.33163},
  note = {CC BY 4.0},
}
RIS
TY  - UNPB
TI  - JFS-CryoMem: A Cryogenic Memory with Voltage-Controlled Superconducting Devices and Femtojoule-Scale Write/Read Energies
AU  - Md Rahatul Islam Udoy
AU  - Md Mazharul Islam
AU  - Juan P. Mendez
AU  - Denis Mamaluy
AU  - Aaron J. Muhowski
AU  - Samuel Hawkins
AU  - William M. Martinez
AU  - Courtney Sovinec
AU  - Wei Pan
AU  - Ahmedullah Aziz
PY  - 2026
DA  - 2026/09/27
PB  - arXiv
DO  - 10.48550/arxiv.2609.33163
UR  - https://arxiv.org/abs/2609.33163
AB  - Scalable cryogenic systems require memory that combines nonvolatile storage, selective access, low thermal disturbance, and compatibility with superconducting electronics. We present a cryogenic memory architecture that integrates a voltage-controlled Josephson junction field-effect transistor (JJFET) selector with a ferroelectric superconducting quantum interference device (FeSQUID) storage element, hereafter termed JFS-CryoMem. The JJFET provides gate-controlled cell selection, whereas the FeSQUID stores information in stable remanent-polarization states. JFS-CryoMem features separate read and write path mechanisms that support nondestructive readout and independent optimization of programming and sensing conditions. The architecture is evaluated using experimentally calibrated compact models that reproduce the measured electrical characteristics of both constituent devices. We demonstrate selective programming using a half-bias scheme, nonvolatile state retention, and distinguishable readout in a 4 × 4 array while accounting for the selected cell and all unselected parallel branches. We then extend the analysis to arrays up to 16 × 16 and examine how array scaling alters current distribution, column-equivalent resistance, readout separation, required bitline current, and read energy. The results reveal the principal sensing and energy tradeoffs associated with larger arrays and identify the operating conditions required to preserve read distinguishability as the array grows. JFS-CryoMem provides a device-to-array framework for cryogenic memory in quantum, high-performance, and space-oriented computing systems.
ER  -