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Gate-defined quantum dot and charge noise analysis in a Forksheet transistor
Abstract
We report the cryogenic characterization of a 14-nm nMOS Forksheet transistor down to 10 mK. We demonstrate that the device retains transistor operation with improved characteristics at cryogenic temperatures, while also forming a gate-defined quantum dot that can be tuned to the single-electron regime. In the quantum-dot regime, we perform low-frequency charge-noise measurements across different charge occupations and observe an average charge-noise amplitude of ⟨ S0⟩ = 10 μeV/√(Hz) at 1 Hz, with a minimum measured value of 3.3 μeV/√(Hz). These results highlight the potential of Forksheet technology for the monolithic cointegration of quantum and classical CMOS functionalities in future quantum processors.
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BibTeX
@misc{leclerc2026gatedefined,
title = {{Gate-defined quantum dot and charge noise analysis in a Forksheet transistor}},
author = {Dominic Leclerc and Claude Rohrbacher and Alexis Morel and Joffrey Rivard and Romain Ritzenthaler and Christian Lupien and Hans Mertens and Naoto Horiguchi and Eva Dupont-Ferrier},
howpublished = {arXiv},
year = {2026},
month = oct,
doi = {10.48550/arxiv.2610.24136},
eprint = {2610.24136},
archivePrefix = {arXiv},
url = {https://arxiv.org/abs/2610.24136},
}
RIS
TY - UNPB
TI - Gate-defined quantum dot and charge noise analysis in a Forksheet transistor
AU - Dominic Leclerc
AU - Claude Rohrbacher
AU - Alexis Morel
AU - Joffrey Rivard
AU - Romain Ritzenthaler
AU - Christian Lupien
AU - Hans Mertens
AU - Naoto Horiguchi
AU - Eva Dupont-Ferrier
PY - 2026
DA - 2026/10/16
PB - arXiv
DO - 10.48550/arxiv.2610.24136
UR - https://arxiv.org/abs/2610.24136
AB - We report the cryogenic characterization of a 14-nm nMOS Forksheet transistor down to 10 mK. We demonstrate that the device retains transistor operation with improved characteristics at cryogenic temperatures, while also forming a gate-defined quantum dot that can be tuned to the single-electron regime. In the quantum-dot regime, we perform low-frequency charge-noise measurements across different charge occupations and observe an average charge-noise amplitude of ⟨ S_0⟩ = 10 μeV/√(Hz) at 1 Hz, with a minimum measured value of 3.3 μeV/√(Hz). These results highlight the potential of Forksheet technology for the monolithic cointegration of quantum and classical CMOS functionalities in future quantum processors.
ER -