Programmable and scalable on-chip WDM processing platform enabled by cascaded FSR-free resonators
Abstract
Wavelength-division multiplexing (WDM) is pivotal for expanding the capacity and functionality of photonic systems, from communications to computing. However, on-chip implementation for broadband operation is fundamentally limited by the narrow free spectral range (FSR) and inefficient drop transmission of conventional optical microcavities. Here, we transcend this limit with a scalable integrated WDM processing platform based on cascaded dual-sided coupled Fabry-Pérot add-drop resonators. This unit achieves a record-large FSR-free bandwidth (> 300 nm) and low insertion loss (< 0.5 dB), while enabling independent manipulation of monochromatic light in both the wavelength and intensity domains. Leveraging these performances, we architect programmable cores with up to 20 channels in a single bus waveguide to demonstrate application versatility by configuring as: a high-capacity on-chip WDM communication fabric (2.4-Tbps single-link WDM transmission and O-to-C-band multi-subband (de)triplexing), a reconfigurable optical processor (broadband and hitless wavelength-selective switching), and a parallel computing accelerator (theoretically capable of 1.28-TOPS convolution operations, 16-channel modulation). This work establishes a unified and versatile WDM processing platform that bridges high-speed optical communication with in-line computing, charting a scalable and backward-compatible path toward petabit-per-second-class links and hundreds of TOPS of on-chip computation, resolving a critical bottleneck for next-generation photonic systems.
Versions
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BibTeX
@misc{sun2026programmable,
title = {{Programmable and scalable on-chip WDM processing platform enabled by cascaded FSR-free resonators}},
author = {Boshu Sun and Haojie Zhu and Ying Sun and Kunhao Lei and Zijia Wang and Kangjian Bao and Weiqi Lu and Yuhao Fang and Yuting Ye and Danyang Hao and Qingyan Deng and Zequn Chen and Yingchun Wu and Maoliang Wei and Wei Cao and Xu Sun and Qicheng Zhang and Hongtao Lin and William Shieh and Lan Li},
howpublished = {arXiv},
year = {2026},
month = sep,
doi = {10.48550/arxiv.2609.27545},
eprint = {2609.27545},
archivePrefix = {arXiv},
url = {https://arxiv.org/abs/2609.27545},
}
RIS
TY - UNPB
TI - Programmable and scalable on-chip WDM processing platform enabled by cascaded FSR-free resonators
AU - Boshu Sun
AU - Haojie Zhu
AU - Ying Sun
AU - Kunhao Lei
AU - Zijia Wang
AU - Kangjian Bao
AU - Weiqi Lu
AU - Yuhao Fang
AU - Yuting Ye
AU - Danyang Hao
AU - Qingyan Deng
AU - Zequn Chen
AU - Yingchun Wu
AU - Maoliang Wei
AU - Wei Cao
AU - Xu Sun
AU - Qicheng Zhang
AU - Hongtao Lin
AU - William Shieh
AU - Lan Li
PY - 2026
DA - 2026/09/23
PB - arXiv
DO - 10.48550/arxiv.2609.27545
UR - https://arxiv.org/abs/2609.27545
AB - Wavelength-division multiplexing (WDM) is pivotal for expanding the capacity and functionality of photonic systems, from communications to computing. However, on-chip implementation for broadband operation is fundamentally limited by the narrow free spectral range (FSR) and inefficient drop transmission of conventional optical microcavities. Here, we transcend this limit with a scalable integrated WDM processing platform based on cascaded dual-sided coupled Fabry-Pérot add-drop resonators. This unit achieves a record-large FSR-free bandwidth (> 300 nm) and low insertion loss (< 0.5 dB), while enabling independent manipulation of monochromatic light in both the wavelength and intensity domains. Leveraging these performances, we architect programmable cores with up to 20 channels in a single bus waveguide to demonstrate application versatility by configuring as: a high-capacity on-chip WDM communication fabric (2.4-Tbps single-link WDM transmission and O-to-C-band multi-subband (de)triplexing), a reconfigurable optical processor (broadband and hitless wavelength-selective switching), and a parallel computing accelerator (theoretically capable of 1.28-TOPS convolution operations, 16-channel modulation). This work establishes a unified and versatile WDM processing platform that bridges high-speed optical communication with in-line computing, charting a scalable and backward-compatible path toward petabit-per-second-class links and hundreds of TOPS of on-chip computation, resolving a critical bottleneck for next-generation photonic systems.
ER -