Calibration-Free Photonic Memory in a Silicon Photonics Platform
Abstract
We propose a calibration-free photonic memory bitcell based on nonresonant variable optical attenuators in the GlobalFoundries 45SPCLO platform. The cell maintains complementary electrical states through electro-optical feedback without cavity-resonance alignment. Wordline-controlled attenuators enable selective writing through differential optical bitlines, while optical readout shares the holding input and output splitters, avoiding additional read attenuators or a separate laser source. Circuit simulations demonstrate writing with 10 ps optical pulses at 2 mW peak power. The cell retains data as long as optical and electrical power are supplied, with retention simulated for 5 s per logic state. The evaluated transition consumes an incremental write energy of 0.562 pJ, including circuit electrical energy and the laser contribution at 20\% wall-plug efficiency. The bitcell layout occupies 147.92×219.93 μm2.
Related
- Broadband Visible-Spectrum Single-Mode Integrated Photonics on a Silicon Nitride Platform
- Ultra-low loss piezo-optomechanical low-confinement silicon nitride platform for visible wavelength quantum photonic circuits
- Mode-selective acousto-electric modulation of phonons in a silicon photonic platform
- f-2f self-referencing for silicon nitride photonics via a heterogeneously integrated lithium niobate layer
- Highly integrated quantum key distribution transmitter enabled by silicon photonics
BibTeX
@misc{singh2026calibrationfree,
title = {{Calibration-Free Photonic Memory in a Silicon Photonics Platform}},
author = {Ankur Singh and Akhilesh Jaiswal},
howpublished = {arXiv},
year = {2026},
month = oct,
doi = {10.48550/arxiv.2610.00748},
eprint = {2610.00748},
archivePrefix = {arXiv},
url = {https://arxiv.org/abs/2610.00748},
note = {CC BY-NC-ND 4.0},
}
RIS
TY - UNPB
TI - Calibration-Free Photonic Memory in a Silicon Photonics Platform
AU - Ankur Singh
AU - Akhilesh Jaiswal
PY - 2026
DA - 2026/10/20
PB - arXiv
DO - 10.48550/arxiv.2610.00748
UR - https://arxiv.org/abs/2610.00748
AB - We propose a calibration-free photonic memory bitcell based on nonresonant variable optical attenuators in the GlobalFoundries 45SPCLO platform. The cell maintains complementary electrical states through electro-optical feedback without cavity-resonance alignment. Wordline-controlled attenuators enable selective writing through differential optical bitlines, while optical readout shares the holding input and output splitters, avoiding additional read attenuators or a separate laser source. Circuit simulations demonstrate writing with 10 ps optical pulses at 2 mW peak power. The cell retains data as long as optical and electrical power are supplied, with retention simulated for 5 s per logic state. The evaluated transition consumes an incremental write energy of 0.562 pJ, including circuit electrical energy and the laser contribution at 20\% wall-plug efficiency. The bitcell layout occupies 147.92×219.93 μm^2.
ER -