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PreprintarXiv licencearXiv

High-performance orbital-torque magnetic memory on the 300-mm platform

15 more authors

Abstract

Contemporary memory technologies are increasingly constrained by the fundamental trilemma of storage capacity, access latency, and power consumption. Among the emerging technologies, spin-orbit torque magnetic random-access memory (SOT-MRAM) shows promise to circumvent these challenges, owing to its fast switching dynamics and high endurance. However, the application of SOT-MRAM is hindered by the relatively low write and read efficiencies, resulting in a large bitcell area and an insufficient sensing margin. Meanwhile, the involvement of an ultrathin spin-source channel, typically within a few nanometers, imposes technological challenges for mass production. Here, we resolve these issues on a 300-mm wafer platform by exploiting the emerging orbital degree of freedom and the resultant orbital torque (OT) from the relatively thick Ti/W bilayer. In particular, OT memory nanodevices exhibit a giant tunnel magnetoresistance (TMR) of 182%, nanosecond-scale response, 1012 endurance, together with an enhanced switching efficiency (E_b/I_c), which consequently enables an ultra-low write energy of less than 0.1 pJ/bit. Our findings demonstrate that orbital angular momentum can be implemented for building energy-efficient MRAM devices, offering a practical pathway towards low-latency memory that is demanded for high-performance computing and AI applications.

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BibTeX
@misc{zeng2026highperformance,
  title = {{High-performance orbital-torque magnetic memory on the 300-mm platform}},
  author = {Dinggui Zeng and Yang Gao and Jinyu Duan and Lei Zhao and Yuhao An and Xing He and Jintao Ke and Yonglong Ga and Shasha Wang and Zhenghui Ji and Muyuan Chen and Hengan Zhou and Xuejie Xie and Enlong Liu and Junlu Gong and Qijun Guo and Yihui Sun and Zejie Zheng and Weiming He and Xiaolei Yang and Fantao Meng and Yaohua Wang and Hongxin Yang and Delin Zhang and Yong Jiang and Wanjun Jiang and Shikun He},
  howpublished = {arXiv},
  year = {2026},
  month = sep,
  doi = {10.48550/arxiv.2609.18008},
  eprint = {2609.18008},
  archivePrefix = {arXiv},
  url = {https://arxiv.org/abs/2609.18008},
}
RIS
TY  - UNPB
TI  - High-performance orbital-torque magnetic memory on the 300-mm platform
AU  - Dinggui Zeng
AU  - Yang Gao
AU  - Jinyu Duan
AU  - Lei Zhao
AU  - Yuhao An
AU  - Xing He
AU  - Jintao Ke
AU  - Yonglong Ga
AU  - Shasha Wang
AU  - Zhenghui Ji
AU  - Muyuan Chen
AU  - Hengan Zhou
AU  - Xuejie Xie
AU  - Enlong Liu
AU  - Junlu Gong
AU  - Qijun Guo
AU  - Yihui Sun
AU  - Zejie Zheng
AU  - Weiming He
AU  - Xiaolei Yang
AU  - Fantao Meng
AU  - Yaohua Wang
AU  - Hongxin Yang
AU  - Delin Zhang
AU  - Yong Jiang
AU  - Wanjun Jiang
AU  - Shikun He
PY  - 2026
DA  - 2026/09/16
PB  - arXiv
DO  - 10.48550/arxiv.2609.18008
UR  - https://arxiv.org/abs/2609.18008
AB  - Contemporary memory technologies are increasingly constrained by the fundamental trilemma of storage capacity, access latency, and power consumption. Among the emerging technologies, spin-orbit torque magnetic random-access memory (SOT-MRAM) shows promise to circumvent these challenges, owing to its fast switching dynamics and high endurance. However, the application of SOT-MRAM is hindered by the relatively low write and read efficiencies, resulting in a large bitcell area and an insufficient sensing margin. Meanwhile, the involvement of an ultrathin spin-source channel, typically within a few nanometers, imposes technological challenges for mass production. Here, we resolve these issues on a 300-mm wafer platform by exploiting the emerging orbital degree of freedom and the resultant orbital torque (OT) from the relatively thick Ti/W bilayer. In particular, OT memory nanodevices exhibit a giant tunnel magnetoresistance (TMR) of 182%, nanosecond-scale response, 1012 endurance, together with an enhanced switching efficiency (E_b/I_c), which consequently enables an ultra-low write energy of less than 0.1 pJ/bit. Our findings demonstrate that orbital angular momentum can be implemented for building energy-efficient MRAM devices, offering a practical pathway towards low-latency memory that is demanded for high-performance computing and AI applications.
ER  -