Fabrication of planar full-SiC-based nanostructured multi-electrode arrays (MEA) for neural interfaces
Abstract
Despite many efforts for developing robust neural implants, existing devices still suffer from short lifespans. The device lifespan is limited by the triggering of the immune response after implantation, leading to structural and functional degradation of the device materials. Among the considered alternatives, Silicon Carbide (SiC) is a particularly attractive material due to its chemical inertness and biocompatibility. Moreover, monolithic SiC-based neural interfaces may be less prone to layer delamination observed in polymer-based implants. Recording neural signals with high spatial resolution requires limiting the electrode dimension at the microscale. However, decreasing the microelectrode dimension impacts the electrochemical impedance and degrades the signal-to-noise ratio. To overcome this restriction, structurization of the electrode surface using nano and microfabrication techniques appears to be a suitable solution allowing to increase the active area without the need of depositing additional active material, thus preserving the monolithic character of the device. In this study, we developed planar multi-electrode arrays fully based on a 4H-SiC stack composed of conductive n-doped and semi-insulating V-doped layer grown by Chemical Vapor Deposition (CVD) on a bulk wafer. To boost the electrochemical performances of the device, the electrode active surface area was nanostructured with a nanopillar array patterned using e-beam and dry etching techniques. Although the effectiveness of the nanofabrication step was partially mitigated by the enhanced roughness of the microelectrode surface, electrochemical measurement demonstrates a positive impact of the nanopatterning of the microelectrode impedance. Our results suggest that nanostructuration is a promising approach for the impedance modulation of small dimension electrodes.
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BibTeX
@article{iacovella2026fabrication,
title = {{Fabrication of planar full-SiC-based nanostructured multi-electrode arrays (MEA) for neural interfaces}},
author = {Fabrice Iacovella and Scott Greenhorn and Gwenaelle Pound-Lana and Lucas Labbe and Sébastien Labau and Camille Petit-Etienne and Anne Quesnel-Hellmann and Fabien Mehr and Andrei Uvarov and Marcin Zielinski and Lionel Rousseau and Franck Bassani and Mohammed Irar and Clément Hébert and Blaise Yvert and Konstantinos Zekentes and Edwige Bano and Cécile Gourgon and Jumana Boussey},
journal = {Micro and Nano Engineering},
year = {2026},
month = aug,
doi = {10.1016/j.mne.2026.100391},
url = {https://hal.science/hal-05732321v1},
note = {CC BY 4.0},
}
RIS
TY - JOUR
TI - Fabrication of planar full-SiC-based nanostructured multi-electrode arrays (MEA) for neural interfaces
AU - Fabrice Iacovella
AU - Scott Greenhorn
AU - Gwenaelle Pound-Lana
AU - Lucas Labbe
AU - Sébastien Labau
AU - Camille Petit-Etienne
AU - Anne Quesnel-Hellmann
AU - Fabien Mehr
AU - Andrei Uvarov
AU - Marcin Zielinski
AU - Lionel Rousseau
AU - Franck Bassani
AU - Mohammed Irar
AU - Clément Hébert
AU - Blaise Yvert
AU - Konstantinos Zekentes
AU - Edwige Bano
AU - Cécile Gourgon
AU - Jumana Boussey
PY - 2026
DA - 2026/08/31
JO - Micro and Nano Engineering
DO - 10.1016/j.mne.2026.100391
UR - https://hal.science/hal-05732321v1
AB - Despite many efforts for developing robust neural implants, existing devices still suffer from short lifespans. The device lifespan is limited by the triggering of the immune response after implantation, leading to structural and functional degradation of the device materials. Among the considered alternatives, Silicon Carbide (SiC) is a particularly attractive material due to its chemical inertness and biocompatibility. Moreover, monolithic SiC-based neural interfaces may be less prone to layer delamination observed in polymer-based implants. Recording neural signals with high spatial resolution requires limiting the electrode dimension at the microscale. However, decreasing the microelectrode dimension impacts the electrochemical impedance and degrades the signal-to-noise ratio. To overcome this restriction, structurization of the electrode surface using nano and microfabrication techniques appears to be a suitable solution allowing to increase the active area without the need of depositing additional active material, thus preserving the monolithic character of the device. In this study, we developed planar multi-electrode arrays fully based on a 4H-SiC stack composed of conductive n-doped and semi-insulating V-doped layer grown by Chemical Vapor Deposition (CVD) on a bulk wafer. To boost the electrochemical performances of the device, the electrode active surface area was nanostructured with a nanopillar array patterned using e-beam and dry etching techniques. Although the effectiveness of the nanofabrication step was partially mitigated by the enhanced roughness of the microelectrode surface, electrochemical measurement demonstrates a positive impact of the nanopatterning of the microelectrode impedance. Our results suggest that nanostructuration is a promising approach for the impedance modulation of small dimension electrodes.
SN - 2590-0072
ER -