Analogue Phase Change Computational Memory with High Precision Reads and Energy Efficient Writes
Abstract
Resistive memory technologies offer a compelling advantage for in-memory computing. However, realizing a device architecture that simultaneously achieves high computational precision, efficiency, and density has remained elusive due to inherent trade-offs among these performance metrics. Here, we introduce a com- pact phase-change memory device architecture that combines an ultra-confined active switching volume for enhanced electro-thermal efficiency with a non-insulating thin film that suppresses temporal conductance fluctuations. We analytically model and back-end integrate these devices into crossbar arrays. Even with conventional, undoped phase-change materials, the device architecture enables a computational precision approaching 6 bits, low conductance values below 50 μS with an adequate conductance window, and a viable pathway toward sub-100 μA programming currents under nominal operating voltages.
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BibTeX
@misc{syed2026analogue,
title = {{Analogue Phase Change Computational Memory with High Precision Reads and Energy Efficient Writes}},
author = {Ghazi Sarwat Syed and Loris Coccia and Vara Prasad Jonnalagadda and Antonio Massimiliano Mio and Asit Ray and Matthew BrightSky and Abu Sebastian},
howpublished = {arXiv},
year = {2026},
month = aug,
doi = {10.48550/arxiv.2608.29338},
eprint = {2608.29338},
archivePrefix = {arXiv},
url = {https://arxiv.org/abs/2608.29338},
note = {CC BY 4.0},
}
RIS
TY - UNPB
TI - Analogue Phase Change Computational Memory with High Precision Reads and Energy Efficient Writes
AU - Ghazi Sarwat Syed
AU - Loris Coccia
AU - Vara Prasad Jonnalagadda
AU - Antonio Massimiliano Mio
AU - Asit Ray
AU - Matthew BrightSky
AU - Abu Sebastian
PY - 2026
DA - 2026/08/29
PB - arXiv
DO - 10.48550/arxiv.2608.29338
UR - https://arxiv.org/abs/2608.29338
AB - Resistive memory technologies offer a compelling advantage for in-memory computing. However, realizing a device architecture that simultaneously achieves high computational precision, efficiency, and density has remained elusive due to inherent trade-offs among these performance metrics. Here, we introduce a com- pact phase-change memory device architecture that combines an ultra-confined active switching volume for enhanced electro-thermal efficiency with a non-insulating thin film that suppresses temporal conductance fluctuations. We analytically model and back-end integrate these devices into crossbar arrays. Even with conventional, undoped phase-change materials, the device architecture enables a computational precision approaching 6 bits, low conductance values below 50 μS with an adequate conductance window, and a viable pathway toward sub-100 μA programming currents under nominal operating voltages.
ER -