TCAD optimization and validation of MAPS with internal low-gain amplification
Abstract
Future tracking and vertex detectors require sensors with finer pitch, improved timing resolution, and minimal power consumption. While monolithic CMOS pixel sensors (MAPS) offer a promising solution, their performance is somewhat limited by the small signal generated in their thin sensitive layers, down to 10 μ m in future technologies. The APICS (Impact Amplification with CMOS Pixel Sensor) project investigates the use of internal low-gain amplification structures to enhance signal levels and enable fast readout in small-pitch designs. TCAD simulations are used to design and optimize gain layer doping profiles and electric-field configurations within a standard 180 nm CMOS imaging process. Simulations predict stable operation with charge multiplication factors reaching approximately 30 at bias voltages in the 30–50 V range. With such gain, the signal from minimum ionizing particles reaches several hundred millivolts at the collection node for femtofarad level capacitances, allowing the design of compact and power-saving in-pixel front-end circuits. The target pixel pitch is 15 μ m , supporting integration into sensors featuring about one megapixel. To validate the simulation framework, experimental data from the CASSIA (CMOS Active Sensor with Internal Amplification) project at CERN were used. The test chips developed within this project, fabricated in the same technology and implementing similar gain structures but with larger pitch, were characterized through laser-based measurements. The measurements confirm gain onset and signal behavior consistent with simulation, validating the TCAD optimization approach. These results guide the design of two prototype chips, which are planned for submission in 2026.
Related
- Local optical feasibility maps for compound lens optimization under direct modulation transfer function constraints
- Complexity Amplification from Compression in Quantum Random Access Optimization
- Agentic TCAD Calibration Workflow for Oxide Semiconductor Transistors
- TCAD + Allpix2 Simulation study of MALTA2, a Depleted Monolithic Active Pixel Sensor for future tracking
- Quantum-Assisted Optimization Guided by Machine-Learned Risk Maps for Aerial Surveillance Routing
BibTeX
@article{shamas2026tcad,
title = {{TCAD optimization and validation of MAPS with internal low-gain amplification}},
author = {H Shamas and E.K Anderson and M Barbero and P Bartulović and J Baudot and I Berdalović and P Breugnon and T Cocquerelle and A Dorokhov and S Haberl and M Jugović and A Kotsokechagia and J Lunde and Y Okazaki and P Pangaud and H Pernegger and B Požar and C Solans Sanchez and T Suligoj and W Uhring},
journal = {Nucl.Instrum.Meth.A},
year = {2026},
month = oct,
doi = {10.1016/j.nima.2026.172137},
url = {https://hal.science/hal-05780334v1},
note = {CC BY},
}
RIS
TY - JOUR
TI - TCAD optimization and validation of MAPS with internal low-gain amplification
AU - H Shamas
AU - E.K Anderson
AU - M Barbero
AU - P Bartulović
AU - J Baudot
AU - I Berdalović
AU - P Breugnon
AU - T Cocquerelle
AU - A Dorokhov
AU - S Haberl
AU - M Jugović
AU - A Kotsokechagia
AU - J Lunde
AU - Y Okazaki
AU - P Pangaud
AU - H Pernegger
AU - B Požar
AU - C Solans Sanchez
AU - T Suligoj
AU - W Uhring
PY - 2026
DA - 2026/10/06
JO - Nucl.Instrum.Meth.A
DO - 10.1016/j.nima.2026.172137
UR - https://hal.science/hal-05780334v1
AB - Future tracking and vertex detectors require sensors with finer pitch, improved timing resolution, and minimal power consumption. While monolithic CMOS pixel sensors (MAPS) offer a promising solution, their performance is somewhat limited by the small signal generated in their thin sensitive layers, down to 10 μ m in future technologies. The APICS (Impact Amplification with CMOS Pixel Sensor) project investigates the use of internal low-gain amplification structures to enhance signal levels and enable fast readout in small-pitch designs. TCAD simulations are used to design and optimize gain layer doping profiles and electric-field configurations within a standard 180 nm CMOS imaging process. Simulations predict stable operation with charge multiplication factors reaching approximately 30 at bias voltages in the 30–50 V range. With such gain, the signal from minimum ionizing particles reaches several hundred millivolts at the collection node for femtofarad level capacitances, allowing the design of compact and power-saving in-pixel front-end circuits. The target pixel pitch is 15 μ m , supporting integration into sensors featuring about one megapixel. To validate the simulation framework, experimental data from the CASSIA (CMOS Active Sensor with Internal Amplification) project at CERN were used. The test chips developed within this project, fabricated in the same technology and implementing similar gain structures but with larger pitch, were characterized through laser-based measurements. The measurements confirm gain onset and signal behavior consistent with simulation, validating the TCAD optimization approach. These results guide the design of two prototype chips, which are planned for submission in 2026.
ER -