The HALO Engine: πͺ(1)-Step Compilation and Localized String Rupture for Lattice Gauge Theories on Quantum Hardware
Abstract
Simulating real-time dynamics in lattice gauge theories (LGTs) is severely constrained by the circuit depth overhead of standard fermion-to-qubit mappings, which scale linearly or quadratically with system size. To overcome this depth-scaling bottleneck, we introduce the Hardware-Aware Lattice Optimization (HALO) compiler, an architecture executing global time-evolution in an immutable πͺ(1) circuit depth per Trotter step. By natively mapping composite gauge links to hardware topologies, HALO achieves a 91.36% reduction in entangling gate overhead compared to unoptimized Jordan-Wigner baselines, compressing a 16-qubit global step to 56 CNOTs and bypassing extensive πͺ(N) scaling limits. We validate this compiler on IBM superconducting transmon processors by simulating the mesoscopic Quantum Link Model (QLM) truncation of the Schwinger model. Coupling πͺ(1) compilation with Zero-Noise Extrapolation (ZNE), we track localized string rupture, extracting the dynamical crossover of pair creation at t β 0.790 with an 18.3 Β± 2.2% rupture probability. Furthermore, we map the dynamical phase diagram, identifying the confinement phase boundary at gc = 1.0. Finally, we introduce a scalable 2D unit-cell blueprint, paving a direct pathway toward the fault-tolerant simulation of two-dimensional Quantum Chromodynamics (QCD).
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BibTeX
@misc{gohar2026halo,
title = {{The HALO Engine: $\mathcalO(1)$-Step Compilation and Localized String Rupture for Lattice Gauge Theories on Quantum Hardware}},
author = {Abhiroop Gohar},
howpublished = {arXiv},
year = {2026},
month = sep,
doi = {10.48550/arxiv.2608.19243},
eprint = {2608.19243},
archivePrefix = {arXiv},
url = {https://arxiv.org/abs/2608.19243},
}
RIS
TY - UNPB
TI - The HALO Engine: πͺ(1)-Step Compilation and Localized String Rupture for Lattice Gauge Theories on Quantum Hardware
AU - Abhiroop Gohar
PY - 2026
DA - 2026/09/10
PB - arXiv
DO - 10.48550/arxiv.2608.19243
UR - https://arxiv.org/abs/2608.19243
AB - Simulating real-time dynamics in lattice gauge theories (LGTs) is severely constrained by the circuit depth overhead of standard fermion-to-qubit mappings, which scale linearly or quadratically with system size. To overcome this depth-scaling bottleneck, we introduce the Hardware-Aware Lattice Optimization (HALO) compiler, an architecture executing global time-evolution in an immutable πͺ(1) circuit depth per Trotter step. By natively mapping composite gauge links to hardware topologies, HALO achieves a 91.36% reduction in entangling gate overhead compared to unoptimized Jordan-Wigner baselines, compressing a 16-qubit global step to 56 CNOTs and bypassing extensive πͺ(N) scaling limits. We validate this compiler on IBM superconducting transmon processors by simulating the mesoscopic Quantum Link Model (QLM) truncation of the Schwinger model. Coupling πͺ(1) compilation with Zero-Noise Extrapolation (ZNE), we track localized string rupture, extracting the dynamical crossover of pair creation at t β 0.790 with an 18.3 Β± 2.2% rupture probability. Furthermore, we map the dynamical phase diagram, identifying the confinement phase boundary at g_c = 1.0. Finally, we introduce a scalable 2D unit-cell blueprint, paving a direct pathway toward the fault-tolerant simulation of two-dimensional Quantum Chromodynamics (QCD).
ER -