Real-Time FPGA-Based Multi-Parameter Feedback Stabilization of a Silicon Double Quantum Dot
Abstract
Long term operation of semiconductor spin qubits requires active stabilization of quantum dot potentials against low-frequency charge noise. To address this, we demonstrate a gradient-descent feedback approach in a silicon double quantum dot device using high-bandwidth radio-frequency (rf) reflectometry readout and a field-programmable gate array (FPGA) for digital signal processing. This architecture enables continuous multi-parameter gradient calculation and quick gate voltage updates, significantly increasing the effective feedback bandwidth compared to previous methods relying on slow direct-current transport measurements. By operating with 8 steps per feedback cycle and an integration time of 25.6 μs, this high-speed stabilization scheme maintains better than -6 dB of noise suppression up to 5 kHz, achieving an attenuation of −7.4 ± 0.2 dB at the maximum measured frequency. This effectively suppresses low-frequency 1/f noise, maintaining device stability over longer time periods, and potentially enables real-time control in large-scale quantum dot arrays.
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BibTeX
@misc{bryan2026realtime,
title = {{Real-Time FPGA-Based Multi-Parameter Feedback Stabilization of a Silicon Double Quantum Dot}},
author = {Johnathan Bryan and Tim J. Wilson and Hong-Wen Jiang},
howpublished = {arXiv},
year = {2026},
month = oct,
doi = {10.48550/arxiv.2608.10325},
eprint = {2608.10325},
archivePrefix = {arXiv},
url = {https://arxiv.org/abs/2608.10325},
note = {CC BY 4.0},
}
RIS
TY - UNPB
TI - Real-Time FPGA-Based Multi-Parameter Feedback Stabilization of a Silicon Double Quantum Dot
AU - Johnathan Bryan
AU - Tim J. Wilson
AU - Hong-Wen Jiang
PY - 2026
DA - 2026/10/23
PB - arXiv
DO - 10.48550/arxiv.2608.10325
UR - https://arxiv.org/abs/2608.10325
AB - Long term operation of semiconductor spin qubits requires active stabilization of quantum dot potentials against low-frequency charge noise. To address this, we demonstrate a gradient-descent feedback approach in a silicon double quantum dot device using high-bandwidth radio-frequency (rf) reflectometry readout and a field-programmable gate array (FPGA) for digital signal processing. This architecture enables continuous multi-parameter gradient calculation and quick gate voltage updates, significantly increasing the effective feedback bandwidth compared to previous methods relying on slow direct-current transport measurements. By operating with 8 steps per feedback cycle and an integration time of 25.6 μs, this high-speed stabilization scheme maintains better than -6 dB of noise suppression up to 5 kHz, achieving an attenuation of −7.4 ± 0.2 dB at the maximum measured frequency. This effectively suppresses low-frequency 1/f noise, maintaining device stability over longer time periods, and potentially enables real-time control in large-scale quantum dot arrays.
ER -