A High Gain Preamplifier Board for Low Charge Semiconductor Detectors
Abstract
We present a high-gain, low-noise preamplifier board designed for reading out low-charge semiconductor detectors--specifically Low-Gain Avalanche Detectors (LGADs) and three-dimensional (3D) silicon sensors--in high-energy physics applications. The circuit employs a three-stage architecture featuring a discrete SiGe:C bipolar junction transistor (BJT)-based transimpedance amplifier (TIA) front-end followed by two resistive feedback amplification stages using LTC6431 chips. This configuration achieves a charge gain of 115.27 mV ns/fC with excellent linearity over an input range of 0.5 fC to 25 fC and a wide bandwidth spanning from 34.0 MHz to 594.3 MHz. Experimental evaluations coupled with LGAD detectors demonstrate a time resolution of 36.41 ps and an equivalent noise charge (ENC) of 0.18 fC at 20 °C. Furthermore, tests with conventional PIN sensors without a gain layer yield a timing resolution of 76.10 ps with an ENC of 0.10 fC, and tests with the 3D silicon detector yield 39.40 ps with an ENC of 0.09 fC, all measured under the same thermal condition. All configurations confirm the board's capability in low-signal regimes, significantly outperforming previous reference designs. A six-channel variant of the board has also been developed to support position-sensitive measurements. These findings demonstrate the board's suitability for laboratory-based 4D tracking detector characterisation, while simultaneously providing the groundwork for dedicated ASIC development.
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BibTeX
@misc{zhang2026high,
title = {{A High Gain Preamplifier Board for Low Charge Semiconductor Detectors}},
author = {De Zhang and Kuo Ma and Juzheng Zhang and Jiajin Ge and Yanwen Liu and Hao Liang},
howpublished = {arXiv},
year = {2026},
month = sep,
doi = {10.48550/arxiv.2608.07963},
eprint = {2608.07963},
archivePrefix = {arXiv},
url = {https://arxiv.org/abs/2608.07963},
}
RIS
TY - UNPB
TI - A High Gain Preamplifier Board for Low Charge Semiconductor Detectors
AU - De Zhang
AU - Kuo Ma
AU - Juzheng Zhang
AU - Jiajin Ge
AU - Yanwen Liu
AU - Hao Liang
PY - 2026
DA - 2026/09/16
PB - arXiv
DO - 10.48550/arxiv.2608.07963
UR - https://arxiv.org/abs/2608.07963
AB - We present a high-gain, low-noise preamplifier board designed for reading out low-charge semiconductor detectors--specifically Low-Gain Avalanche Detectors (LGADs) and three-dimensional (3D) silicon sensors--in high-energy physics applications. The circuit employs a three-stage architecture featuring a discrete SiGe:C bipolar junction transistor (BJT)-based transimpedance amplifier (TIA) front-end followed by two resistive feedback amplification stages using LTC6431 chips. This configuration achieves a charge gain of 115.27 mV ns/fC with excellent linearity over an input range of 0.5 fC to 25 fC and a wide bandwidth spanning from 34.0 MHz to 594.3 MHz. Experimental evaluations coupled with LGAD detectors demonstrate a time resolution of 36.41 ps and an equivalent noise charge (ENC) of 0.18 fC at 20 °C. Furthermore, tests with conventional PIN sensors without a gain layer yield a timing resolution of 76.10 ps with an ENC of 0.10 fC, and tests with the 3D silicon detector yield 39.40 ps with an ENC of 0.09 fC, all measured under the same thermal condition. All configurations confirm the board's capability in low-signal regimes, significantly outperforming previous reference designs. A six-channel variant of the board has also been developed to support position-sensitive measurements. These findings demonstrate the board's suitability for laboratory-based 4D tracking detector characterisation, while simultaneously providing the groundwork for dedicated ASIC development.
ER -