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In-Memory AM Demodulation Using an All-Silicon Independent-Dual-Gate Gain-Cell Memory with <10−22 A Leakage Determined by Single-Electron Counting

  • Katsuhiko Nishiguchi
  • Toshiaki Hayashi
  • Kensaku Chida
  • Takase Shimizu
  • Gento Yamahata
  • Seiya Kasai
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Abstract

Ultra-low-leakage memories are attracting increasing attention for in-memory sensing and computing. However, achieving sufficiently long retention in silicon memories for analog signal processing remains challenging because of leakage through the access transistor. In this work, we demonstrate an all-silicon independent-dual-gate memory whose leakage current, inferred from single-electron counting statistics, is below 10−22 A, giving a measured retention time exceeding 1000 s. Owing to the extremely low leakage, the subthreshold nonlinearity of the access transistor can be exploited without disturbing the stored charge, enabling in-memory amplitude-modulation (AM) demodulation. The proposed memory provides a CMOS-compatible platform for ultra-low-power signal processing and in-memory sensing.

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Cite

BibTeXRIS
BibTeX
@misc{nishiguchi2026inmemory,
  title = {{In-Memory AM Demodulation Using an All-Silicon Independent-Dual-Gate Gain-Cell Memory with $<10^-22$ A Leakage Determined by Single-Electron Counting}},
  author = {Katsuhiko Nishiguchi and Toshiaki Hayashi and Kensaku Chida and Takase Shimizu and Gento Yamahata and Seiya Kasai},
  howpublished = {arXiv},
  year = {2026},
  month = sep,
  doi = {10.48550/arxiv.2609.32122},
  eprint = {2609.32122},
  archivePrefix = {arXiv},
  url = {https://arxiv.org/abs/2609.32122},
}
RIS
TY  - UNPB
TI  - In-Memory AM Demodulation Using an All-Silicon Independent-Dual-Gate Gain-Cell Memory with <10^−22 A Leakage Determined by Single-Electron Counting
AU  - Katsuhiko Nishiguchi
AU  - Toshiaki Hayashi
AU  - Kensaku Chida
AU  - Takase Shimizu
AU  - Gento Yamahata
AU  - Seiya Kasai
PY  - 2026
DA  - 2026/09/26
PB  - arXiv
DO  - 10.48550/arxiv.2609.32122
UR  - https://arxiv.org/abs/2609.32122
AB  - Ultra-low-leakage memories are attracting increasing attention for in-memory sensing and computing. However, achieving sufficiently long retention in silicon memories for analog signal processing remains challenging because of leakage through the access transistor. In this work, we demonstrate an all-silicon independent-dual-gate memory whose leakage current, inferred from single-electron counting statistics, is below 10^−22 A, giving a measured retention time exceeding 1000 s. Owing to the extremely low leakage, the subthreshold nonlinearity of the access transistor can be exploited without disturbing the stored charge, enabling in-memory amplitude-modulation (AM) demodulation. The proposed memory provides a CMOS-compatible platform for ultra-low-power signal processing and in-memory sensing.
ER  -