Wafer-scale synthesis of WSe ₂ for high-performance p-type top-gated transistors and logic circuits
- 1School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seoul 03722, Republic of Korea.
Abstract
Two-dimensional (2D) transition metal dichalcogenides (TMDs) offer a promising pathway for next-generation electronics due to their exceptional electrical characteristics at atomically thin thickness. Nevertheless, the realization of high-quality p-type 2D-FETs remains a significant challenge for CMOS device integration due to surface damage and unintended n-doping induced during dielectric deposition. In this work, we report the wafer-scale synthesis of p-type WSe 2 films using metal-organic chemical vapor deposition and the fabrication of top-gate p-FETs through a buffer layer strategy, which provides superior electrostatic control and channel stability. The transistors exhibit excellent p-type performance, achieving a hole mobility of 10.49 ± 2.35 cm 2 V −1 s −1 with on/off current ratio exceeding 10 9 . By leveraging the process’s scalability, which ensures uniform and damage-free fabrication, we successfully produced reliable wafer-scale PMOS logic circuits. This study provides a scalable, damage-free integration solution for 2D electronics, paving the way for the practical realization of all 2D-based high-density electronics and circuits.
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BibTeX
@article{choi2026waferscale,
title = {{Wafer-scale synthesis of WSe ₂ for high-performance p-type top-gated transistors and logic circuits}},
author = {Jonggyu Choi and Hayoung Kim and Seungsoo Kim and Mingyu Kim and Seungmin Yang and Juyeong Hong and Seokmin Yun and Ajit K. Katiyar and Jong-Hyun Ahn},
journal = {Science Advances},
year = {2026},
month = oct,
doi = {10.1126/sciadv.aef4354},
url = {https://www.science.org/doi/10.1126/sciadv.aef4354},
note = {CC BY-NC},
}
RIS
TY - JOUR
TI - Wafer-scale synthesis of WSe ₂ for high-performance p-type top-gated transistors and logic circuits
AU - Jonggyu Choi
AU - Hayoung Kim
AU - Seungsoo Kim
AU - Mingyu Kim
AU - Seungmin Yang
AU - Juyeong Hong
AU - Seokmin Yun
AU - Ajit K. Katiyar
AU - Jong-Hyun Ahn
PY - 2026
DA - 2026/10/09
JO - Science Advances
DO - 10.1126/sciadv.aef4354
UR - https://www.science.org/doi/10.1126/sciadv.aef4354
AB - Two-dimensional (2D) transition metal dichalcogenides (TMDs) offer a promising pathway for next-generation electronics due to their exceptional electrical characteristics at atomically thin thickness. Nevertheless, the realization of high-quality p-type 2D-FETs remains a significant challenge for CMOS device integration due to surface damage and unintended n-doping induced during dielectric deposition. In this work, we report the wafer-scale synthesis of p-type WSe 2 films using metal-organic chemical vapor deposition and the fabrication of top-gate p-FETs through a buffer layer strategy, which provides superior electrostatic control and channel stability. The transistors exhibit excellent p-type performance, achieving a hole mobility of 10.49 ± 2.35 cm 2 V −1 s −1 with on/off current ratio exceeding 10 9 . By leveraging the process’s scalability, which ensures uniform and damage-free fabrication, we successfully produced reliable wafer-scale PMOS logic circuits. This study provides a scalable, damage-free integration solution for 2D electronics, paving the way for the practical realization of all 2D-based high-density electronics and circuits.
SN - 2375-2548
ER -