Skip to content
DraconiticResearch
Search Sources API
197,768 studies31 sourcesUpdated 4 min ago
PreprintarXiv licencearXiv

Readout chain of SPD DAQ system

Abstract

The Spin Physics Detector (SPD) experiment at the NICA collider of the Joint Institute for Nuclear Research (JINR) aims to study the spin structure of the nucleon and spin-related phenomena. The experimental conditions, including the high interaction rate and the large number of readout channels, require a triggerless data acquisition system with high throughput and a scalable architecture. This work presents a hardware implementation of the readout chain that extends the previously proposed SPD DAQ architecture. The chain is based on two levels of concentrators. The L1 concentrator provides the interface between the front-end electronics and the next system level and distributes synchronous signals. The L2 concentrator aggregates data streams from several L1 concentrators before transmitting them to the computing system. A key feature of the L2 implementation is the offloading of data reception, buffering, and aggregation from the host CPU to the FPGA, motivated by the large number of small packets generated by the readout electronics. The developed hardware platforms and their operating logic are presented, together with experimental results for the main interfaces and data-path components. The obtained results demonstrate the feasibility of the proposed hardware architecture and its application in a scalable SPD data acquisition system.

Related

  1. Competition and cancellation in a tilted Rice--Mele chain: exact Wannier--Stark offset and spectral readout
    Xiang Gao, Xing Deng, Shoulong Chen +4
    arXivPreprintCC BY 4.0Full textQuantum physics & quantum informationarXiv
  2. TD-Link: A Daisy-Chain Optical Architecture for Integrated Data Readout and Deterministic Timing Distribution in Large-Scale Detector Systems
    Andrea Abba, Gianluca Becuzzi, Matteo Bianchini +8
    arXivPreprintarXiv licenceFull textApplied physics & instrumentationarXiv
  3. Development of an FPGA-Based Readout System and Functional Characterization of a Custom NSX1 ASIC for X-ray instrumentation
    Nabin Poudyal, Wayne Baumgartner, Sukanya Chakrabarti +6
    arXivPreprintarXiv licenceFull textInstrumentation & methodsApplied physics & instrumentationarXiv
  4. Application and Optimization of the GET Electronics System for Double-Sided Silicon Strip Detector Readout
    Jiawei Bian, Zaihong Yang, Qite Li +7
    arXivPreprintCC BY-NC-ND 4.0Full textApplied physics & instrumentationNuclear physicsarXiv
  5. An integrated readout system for parallel-plate avalanche counter and multi-wire drift chamber at HIAF-HIRIBL
    E. Q. Liu, T. S. Huang, Z. X. Ma +14
    arXivPreprintarXiv licenceFull textApplied physics & instrumentationNuclear physicsarXiv
BibTeX
@misc{afanasyev2026readout,
  title = {{Readout chain of SPD DAQ system}},
  author = {L. Afanasyev and A. Berngardt and A. Boikov and V. Borshch and D. Erofeev and V. Frolov and K. Gritsay and V. Olshevsky and A. Kulikov and S. Tereshchenko and V. Tereshchenko},
  howpublished = {arXiv},
  year = {2026},
  month = oct,
  doi = {10.48550/arxiv.2610.16515},
  eprint = {2610.16515},
  archivePrefix = {arXiv},
  url = {https://arxiv.org/abs/2610.16515},
}
RIS
TY  - UNPB
TI  - Readout chain of SPD DAQ system
AU  - L. Afanasyev
AU  - A. Berngardt
AU  - A. Boikov
AU  - V. Borshch
AU  - D. Erofeev
AU  - V. Frolov
AU  - K. Gritsay
AU  - V. Olshevsky
AU  - A. Kulikov
AU  - S. Tereshchenko
AU  - V. Tereshchenko
PY  - 2026
DA  - 2026/10/29
PB  - arXiv
DO  - 10.48550/arxiv.2610.16515
UR  - https://arxiv.org/abs/2610.16515
AB  - The Spin Physics Detector (SPD) experiment at the NICA collider of the Joint Institute for Nuclear Research (JINR) aims to study the spin structure of the nucleon and spin-related phenomena. The experimental conditions, including the high interaction rate and the large number of readout channels, require a triggerless data acquisition system with high throughput and a scalable architecture. This work presents a hardware implementation of the readout chain that extends the previously proposed SPD DAQ architecture. The chain is based on two levels of concentrators. The L1 concentrator provides the interface between the front-end electronics and the next system level and distributes synchronous signals. The L2 concentrator aggregates data streams from several L1 concentrators before transmitting them to the computing system. A key feature of the L2 implementation is the offloading of data reception, buffering, and aggregation from the host CPU to the FPGA, motivated by the large number of small packets generated by the readout electronics. The developed hardware platforms and their operating logic are presented, together with experimental results for the main interfaces and data-path components. The obtained results demonstrate the feasibility of the proposed hardware architecture and its application in a scalable SPD data acquisition system.
ER  -